Title :
Assessment of the impact of technology scaling on the performance of LC-VCOs
Author :
Ponton, D. ; Knoblinger, G. ; Roithmeier, A. ; Tiebout, M. ; Fulde, M. ; Palestri, P.
Author_Institution :
DIEGM, Univ. of Udine, Udine, Italy
Abstract :
This paper analyzes the scaling of LC voltage controlled oscillator (LC-VCO) implemented in advanced planar CMOS technologies. An LC-VCO for GSM applications, has been designed in state-of-the-art 45/40 nm and 32 nm CMOS technologies, exploiting different front- and back-end of line (FEOL/BEOL) options. The designs are compared with each other and with recent literature in terms of power and phase-noise performance.
Keywords :
CMOS integrated circuits; phase noise; voltage-controlled oscillators; LC voltage controlled oscillator; phase-noise performance; planar CMOS technology; size 32 nm to 45 nm; technology scaling; Bridge circuits; CMOS technology; GSM; Impedance; MOS devices; Radio frequency; Tail; Topology; Tuning; Voltage control;
Conference_Titel :
Solid State Device Research Conference, 2009. ESSDERC '09. Proceedings of the European
Conference_Location :
Athens
Print_ISBN :
978-1-4244-4351-2
Electronic_ISBN :
1930-8876
DOI :
10.1109/ESSDERC.2009.5331398
