A Theoretical Framework for On-chip Stochastic Communication Analysis

One of the greatest challenges of the emerging VLSI technology is the shift from design determinism to design uncertainty. Indeed, at nanoscale, the chip manufacturability entails failure increase and unpredictable behavior and thus, in order to ensure system-level fault-tolerance, we need to consider alternative paradigms for on-chip communication. This paper investigates the theoretical foundations and the design implications of a biologically-inspired communication approach which can be used for on-chip multiprocessor communication