• DocumentCode
    2360438
  • Title

    Fault tolerant circuits and probabilistically checkable proofs

  • Author

    Gál, Anna ; Szegedy, Mario

  • Author_Institution
    Dept. of Comput. Sci., Chicago Univ., IL, USA
  • fYear
    1995
  • fDate
    19-22 Jun 1995
  • Firstpage
    65
  • Lastpage
    73
  • Abstract
    We introduce a new model of fault tolerance for Boolean circuits. We consider synchronized circuits and we allow an adversary to choose a small constant fraction of the gates at each level of the circuit to be faulty. We require that even in the presence of such faults the circuit compute a “loose version” of the given function. We show that every symmetric function has a small (size O(n), depth O(log n)) fault tolerant circuit in this model. We also show a perhaps unexpected relation between our model and probabilistically checkable proofs
  • Keywords
    Boolean functions; computational complexity; fault tolerant computing; Boolean circuits; fault tolerant circuits; loose version; probabilistically checkable proofs; symmetric function; synchronized circuits; Boolean functions; Circuit faults; Computer science; Fault tolerance; Hardware; Redundancy;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Structure in Complexity Theory Conference, 1995., Proceedings of Tenth Annual IEEE
  • Conference_Location
    Minneapolis, MN
  • ISSN
    1063-6870
  • Print_ISBN
    0-8186-7052-5
  • Type

    conf

  • DOI
    10.1109/SCT.1995.514728
  • Filename
    514728