Title :
Semi-unbounded fan-in circuits: Boolean vs. arithmetic
Author_Institution :
Dept. of Comput. Sci., Chicago Univ., IL, USA
Abstract :
We prove that polynomial size semi-unbounded fan-in Boolean circuits of depth d can be simulated by polynomial size semi-unbounded fan-in arithmetic circuits of depth O(d+log n), where the arithmetic operations +, -, × are performed in an arbitrary finite field. It is impossible to achieve this via gate-by-gate simulation. Instead, the proof is based on a randomized reduction to “unique witnesses” in the spirit of L.G. Valiant and V.V. Vazirani (1986) K. Mulmuley et al. (1987) and A. Wigderson (1994)
Keywords :
Boolean functions; computational complexity; Boolean circuits; arithmetic operations; randomized reduction; semi-unbounded fan-in circuits; Automata; Boolean functions; Circuit simulation; Computational modeling; Computer science; Computer simulation; Digital arithmetic; Galois fields; Polynomials;
Conference_Titel :
Structure in Complexity Theory Conference, 1995., Proceedings of Tenth Annual IEEE
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-8186-7052-5
DOI :
10.1109/SCT.1995.514730