DocumentCode :
2361324
Title :
Yield management for development and manufacture of integrated circuits
Author :
Koyama, Hiroshi ; Inokuchi, Masayuki
Author_Institution :
JEOL Ltd., Tokyo, Japan
fYear :
1998
fDate :
23-25 Sep 1998
Firstpage :
208
Lastpage :
211
Abstract :
The purpose of this paper is to outline a strategic element of yield management methodologies for the development and fabrication of advanced ULSI circuits. Fundamental ideas with regard to knowledge conversion and a detailed yield management system are described
Keywords :
ULSI; failure analysis; fault location; integrated circuit design; integrated circuit testing; integrated circuit yield; production testing; IC development; IC manufacture; ULSI circuits; integrated circuits; knowledge conversion; strategic element; yield management; yield management methodologies; yield management strategy; yield management system; Computer integrated manufacturing; Failure analysis; Image analysis; Inspection; Integrated circuit manufacture; Integrated circuit yield; Knowledge management; Manufacturing processes; Semiconductor device manufacture; Technology management;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Semiconductor Manufacturing Conference and Workshop, 1998. 1998 IEEE/SEMI
Conference_Location :
Boston, MA
ISSN :
1078-8743
Print_ISBN :
0-7803-4380-8
Type :
conf
DOI :
10.1109/ASMC.1998.731555
Filename :
731555
Link To Document :
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