Title :
A study of post-chemical-mechanical polish cleaning strategies
Author :
Huynh ; Rutten, M. ; Cheek, R. ; Linde, H.
Author_Institution :
Microelectron. Div., IBM Corp., Essex Junction, VT, USA
Abstract :
Chemical-mechanical polishing (CMP) has emerged as the premier technique for achieving both local and global planarization. One of the primary concerns in the use of CMP, however, is the efficient and complete removal of CMP contaminants such as slurry and residual hydrocarbons. This paper discusses the removal of silica-based slurries utilized for polysilicon and oxide CMP processes. The effects of mechanical brush cleaning, chemical treatments, and polish processes on defect density for a 16 Mb memory technology are presented. In addition, the chemical compatibility of polishing slurries with various brush and polishing pad materials is discussed
Keywords :
chemical mechanical polishing; dielectric thin films; integrated circuit technology; integrated memory circuits; surface chemistry; surface cleaning; surface contamination; 16 Mbit; CMP; CMP contaminant removal; CMP slurry; Si; SiO2; chemical-mechanical polishing; global planarization; local planarization; oxide CMP processes; polysilicon CMP processes; post-chemical-mechanical polish cleaning strategies; residual hydrocarbons; silica-based slurry removal; Brushes; Chemicals; Cleaning; Costs; Hydrocarbons; Manufacturing processes; Planarization; Slurries; Surface contamination; Surface treatment;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference and Workshop, 1998. 1998 IEEE/SEMI
Conference_Location :
Boston, MA
Print_ISBN :
0-7803-4380-8
DOI :
10.1109/ASMC.1998.731621
