BZK.SAU.FPGA10.0: Microprocessor architecture design on reconfigurable hardware as an educational tool

Author

Oztekin, Halit ; Temurtas, Feyzullah ; Gulbag, Ali

fYear

2011

fDate

20-23 March 2011

Firstpage

385

Lastpage

389

Abstract

The Computer Architecture and Organization course in Computer and Electrical Engineering departments faces with a big problem: the migration from theory to practice. In order to solve this problem, a Computer Architecture simulator named BZK.SAU is designed using an emulator program for educational purpose. This approach has important limitations. While students can complete and simulate their designs using software, they do not have the chance to implement and to run their designs in actual hardware. This work presents our solution to this problem: the FPGA implementation of BZK.SAU so that it would look and behave like the computer architecture simulator published in. So we have implemented BZK.SAU Computer Architecture Simulator by using Altera^® FPGA board that is a reconfigurable hardware prototyping development platform.

Keywords

computer aided instruction; computer science education; electronic engineering computing; electronic engineering education; field programmable gate arrays; integrated circuit design; microcomputers; reconfigurable architectures; Altera FPGA board; BZK.SAU.FPGA10.0; computer and electrical engineering departments; computer architecture simulator; educational tool; microprocessor architecture design; reconfigurable hardware prototyping development platform; Computer architecture; Computers; Education; Field programmable gate arrays; Microprocessors; Organizations; Registers; Computer Architecture and Organization; Digital Logic Design; Educational Tool; FPGA; Microcomputer Design; Microprocessor;

fLanguage

English

Publisher

ieee

Conference_Titel

Computers & Informatics (ISCI), 2011 IEEE Symposium on

Conference_Location

Kuala Lumpur

Print_ISBN

978-1-61284-689-7

Type

conf

DOI

10.1109/ISCI.2011.5958946

Filename

5958946