DocumentCode :
2363189
Title :
Jitter peaking investigation in charge pump based clock and data recovery circuits
Author :
Samii, F. ; Abrishamifar, Adib ; Atani, Reza Ebrahimi
Author_Institution :
Iran Univ. of Sci. & Technol., Tehran
fYear :
2007
fDate :
26-28 Sept. 2007
Firstpage :
1
Lastpage :
6
Abstract :
Jitter transfer function of a clock and data recovery circuit (CDR) must satisfy difficult specifications versus of loop bandwidth and jitter peaking. This paper describes the method of setting poles and zero in third order CDR circuit to keep jitter peaking below a certain value required by specific optical standards. The results are validated by MATLAB simulations for a 10 Gb I s clock and data recovery circuit with an approximately 1MHz bandwidth.
Keywords :
clocks; poles and zeros; synchronisation; timing jitter; transfer functions; MATLAB simulations; charge pump; clock recovery; data recovery; jitter peaking investigation; jitter transfer function; low pass filter; optical standards; Bandwidth; Charge pumps; Circuits; Clocks; Frequency; Jitter; Low pass filters; Optical receivers; Transfer functions; Voltage-controlled oscillators; Clock and data recovery circuit; jitter peaking; jitter transfer fuction; low pass filter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
AFRICON 2007
Conference_Location :
Windhoek
Print_ISBN :
978-1-4244-0987-7
Electronic_ISBN :
978-1-4244-0987-7
Type :
conf
DOI :
10.1109/AFRCON.2007.4401483
Filename :
4401483
Link To Document :
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