DocumentCode :
2363980
Title :
Rapid design of discrete cosine transform cores
Author :
Hunter, Jill K. ; McCanny, John V.
Author_Institution :
Dept. of Electr. & Electron. Eng., Queen´´s Univ., Belfast, UK
fYear :
1998
fDate :
35838
Firstpage :
42491
Lastpage :
42496
Abstract :
The broader use of DCT circuits underlines the need for a more systematic and generalised approach to silicon DCT design. In addition, increasing commercial pressures, particularly in areas such as multi-media, broadcasting and telecommunications systems strongly motivate the need to develop methods for the rapid design and portability of application specific cores to create new generations of DSP silicon systems. The purpose of this paper is to describe a highly modularised and flexible approach to the design of DCT circuits. A major objective has been to create synthesisable hardware description language generators for the very rapid design of application specific DSP cores. This is part of a larger on going program within this laboratory, the objective of which is to reduce the design time for complex DSP cores by at least an order of magnitude. An important aspect of the research presented has been to develop modular blocks, which not only lend themselves to parameterisation in terms of variables such as transform size and word lengths, but which also allow flexible design tradeoffs. This allows circuit designs to be tailored to the spectrum of bandwidths required across many application areas
Keywords :
discrete cosine transforms; DCT circuits; application specific DSP cores; circuit design; discrete cosine transform cores; hardware description language generators; rapid design; silicon DCT design;
fLanguage :
English
Publisher :
iet
Conference_Titel :
High Performance Architectures for Real-Time Image Processing (Ref. No. 1998/197), IEE Colloquium on
Conference_Location :
London
Type :
conf
DOI :
10.1049/ic:19980045
Filename :
667488
Link To Document :
بازگشت