DocumentCode
2364170
Title
Predictive TCAD modeling of the scaling-induced, reverse-biased, emitter-base tunneling current in SiGe HBTs
Author
Chakraborty, Partha S. ; Moen, Kurt A. ; Cressler, John D.
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2011
fDate
9-11 Oct. 2011
Firstpage
13
Lastpage
16
Abstract
We investigate, for the first time, predictive TCAD modeling of scaling-induced, reverse-biased emitter-base junction tunneling current in state-of-the-art SiGe HBTs. Different operative tunneling mechanisms are identified, including important factors that determine the accuracy of the simulations. The models for different tunneling mechanisms are applied to multiple generations of SiGe HBTs to examine their validity. Implications of these results and their use in TCAD-based device optimization are discussed. Finally, this study highlights the nature of the emitter-base junction degradation that results from an accelerated stress in the tunneling regime for different generations of SiGe HBTs.
Keywords
Ge-Si alloys; heterojunction bipolar transistors; semiconductor device models; technology CAD (electronics); HBT; SiGe; TCAD-based device optimization; emitter-base junction degradation; emitter-base tunneling current; predictive TCAD modeling; reverse-biased emitter-base junction tunneling current; Current measurement; Heterojunction bipolar transistors; Performance evaluation; Silicon germanium; Stress; Temperature measurement; Tunneling; Band-to-Band Tunneling; Emitter-Base Junction; Heterojunction Bipolar Transistors; Silicon-Germanium; Trap-Assisted Tunneling; Tunneling; Tunneling Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2011 IEEE
Conference_Location
Atlanta, GA
ISSN
1088-9299
Print_ISBN
978-1-61284-165-6
Type
conf
DOI
10.1109/BCTM.2011.6082739
Filename
6082739
Link To Document