DocumentCode :
2364859
Title :
Hardware compilation technology for embedded image processing
Author :
Sheen, T.M. ; Allen, A.R. ; Lawrence, A.E. ; Page, I.
Author_Institution :
Dept. of Eng., Aberdeen Univ., UK
fYear :
1998
fDate :
35838
Firstpage :
42614
Lastpage :
42619
Abstract :
There are an increasing number of applications of automated image analysis in which imaging is part of an instrumentation or process control system. A variety of industrial processes, including quality control and assembly, robotic, security and other applications make use of machine vision. Such embedded applications often require performance to be tuned in various ways to satisfy time constraints, which may vary through the lifetime of the application. There may, in addition, be a requirement to produce versions of an imaging product targetted at different classes of user, to satisfy various market niches, for example. It is therefore important to develop software tools which allow developers to relatively easily target a variety of computational engines. Possible target systems may include PC, dedicated microprocessor or digital signal processor, multiprocessors, or custom hardware. We report our experience in applying hardware compilation technology in an FPGA-based system to some typical image processing tasks
Keywords :
image processing; automated image analysis; custom hardware; embedded image processing; hardware compilation; image processing tasks; industrial processes;
fLanguage :
English
Publisher :
iet
Conference_Titel :
High Performance Architectures for Real-Time Image Processing (Ref. No. 1998/197), IEE Colloquium on
Conference_Location :
London
Type :
conf
DOI :
10.1049/ic:19980049
Filename :
667492
Link To Document :
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