DocumentCode :
2364877
Title :
CMOS implementation of one layer of neurons for pattern recognition system
Author :
Moshfe, Sajjad ; Mashoufi, Behboud ; Kamali, Naser
Author_Institution :
Microelectron. Res. Lab., URMIA Univ., Urmia, Iran
fYear :
2011
fDate :
25-27 April 2011
Firstpage :
83
Lastpage :
86
Abstract :
This paper provides a CMOS implementation of single layer of neurons. A current mode mixed signal circuit is proposed to normalize the characteristic bits and to multiply the normalized characteristic bits by the weight values. A comparator is used as an activation function. Simulation results show that our proposed circuit is working well with wide range of current values. Finally, layout of this single layer multi neurons circuit is presented.
Keywords :
CMOS integrated circuits; current-mode circuits; mixed analogue-digital integrated circuits; neural nets; pattern recognition; CMOS implementation; current mode mixed signal circuit; one layer of neuron; pattern recognition system; single layer multineurons circuit; Artificial neural networks; Layout; Multiplying circuits; Neurons; Operational amplifiers; Pattern recognition; Simulation; Neural Network; current mode; mixed signal CMOS implementation; pattern recognition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Devices, Systems and Applications (ICEDSA), 2011 International Conference on
Conference_Location :
Kuala Lumpur
ISSN :
2159-2047
Print_ISBN :
978-1-61284-388-9
Type :
conf
DOI :
10.1109/ICEDSA.2011.5959043
Filename :
5959043
Link To Document :
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