DocumentCode :
2365034
Title :
Efficient Grouping of Fail Chips for Volume Yield Diagnostics
Author :
Lavanya Jagan ; Singh, Ratan Deep ; Kamakoti, V. ; Majhi, Ananta K.
Author_Institution :
Reconfigurable & Intell. Syst. Eng. Group, Indian Inst. of Technol., Madras
fYear :
2009
fDate :
5-9 Jan. 2009
Firstpage :
97
Lastpage :
102
Abstract :
Volume Yield Diagnostics (VYD) is crucial to diagnose critical systematic yield issues from the reports obtained by testing thousands of chips. This paper presents an efficient clustering technique for VYD that has been shown to work successfully both in the simulation environment as well as on real industrial failure data.
Keywords :
failure analysis; semiconductor industry; clustering technique; fail chips; fail signatures; industrial failure; volume yield diagnostics; Computer science; Design engineering; Electronics industry; Inspection; Intelligent systems; Runtime; Semiconductor device testing; Systems engineering and theory; Technological innovation; Very large scale integration; Clustering; Fail Signatures; Systematic Defects; Volume Yield Diagnostics; Yield;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2009 22nd International Conference on
Conference_Location :
New Delhi
ISSN :
1063-9667
Print_ISBN :
978-0-7695-3506-7
Type :
conf
DOI :
10.1109/VLSI.Design.2009.59
Filename :
4749659
Link To Document :
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