DocumentCode
2365076
Title
Software caching using dynamic binary rewriting for embedded devices
Author
Huneycutt, Chad M. ; Fryman, Joshua B. ; Mackenzie, Kenneth M.
Author_Institution
Coll. of Comput., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2002
fDate
2002
Firstpage
621
Lastpage
630
Abstract
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss time. We describe a software cache system implemented using dynamic binary rewriting and observe that the combination is particularly appropriate for the scenario of a simple embedded system connected to a more powerful server over a network. As two examples, consider a network of sensors with local processing or cell phones connected to cell towers. We describe two software cache systems for instruction caching only using dynamic binary rewriting and present results for the performance of instruction caching in these systems. We measure time overheads of 19% compared to no caching. We also show that we can guarantee a 100% hit rate for codes that fit in the cache. For comparison, we estimate that a comparable hardware cache would have space overhead of 12-18% for its tag array and would offer no hit rate guarantee.
Keywords
cache storage; distributed processing; embedded systems; program compilers; software performance evaluation; data caching; dynamic binary rewriting; embedded devices; embedded system; hardware cache; hit rate guarantee; instruction caching; performance; sensors; software caching; tag array; Calibration; Cellular phones; Costs; Embedded software; Embedded system; Hardware; Memory management; Network servers; Poles and towers; Software systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing, 2002. Proceedings. International Conference on
ISSN
0190-3918
Print_ISBN
0-7695-1677-7
Type
conf
DOI
10.1109/ICPP.2002.1040920
Filename
1040920
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