• DocumentCode
    2365470
  • Title

    Self-isolated and high performance complementary lateral DMOSFETs with surrounding-body regions

  • Author

    Kitamura, Akio ; Motoi, Yasuro ; Fujishima, Naoto

  • Author_Institution
    Fuji Electr. Corp. Res. & Dev. Ltd., Matsumoto, Japan
  • fYear
    1995
  • fDate
    23-25 May 1995
  • Firstpage
    42
  • Lastpage
    47
  • Abstract
    This paper reports on self-isolated complementary Lateral DMOSFETs (LDMOSFETs) with Surrounding-Body regions (SE regions). They are fully compatible with 3 V CMOS, lateral NPN and lateral PNP by using the sub-micron Bi-CDMOS process. The N-channel and P-channel DMOSFETs show breakdown voltages of 87 V and 73 V, and specific on-resistances of 0.124 Ω· mm2 and 0·315 Ω·mm 2, respectively
  • Keywords
    BiCMOS integrated circuits; MOSFET; electric breakdown; isolation technology; semiconductor technology; 3 V; 73 V; 87 V; breakdown voltages; complementary lateral DMOSFETs; self-isolated devices; specific on-resistances; sub-micron Bi-CDMOS process; surrounding-body regions; Breakdown voltage; CMOS process; Cities and towns; Fabrication; Implants; Impurities; Isolation technology; MOSFETs; Research and development; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Semiconductor Devices and ICs, 1995. ISPSD '95., Proceedings of the 7th International Symposium on
  • Conference_Location
    Yokohama
  • ISSN
    1063-6854
  • Print_ISBN
    0-7803-2618-0
  • Type

    conf

  • DOI
    10.1109/ISPSD.1995.515006
  • Filename
    515006
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2365470