A manufacturable ILD gap fill process with biased ECR CVD

The authors describe the development of a high throughput interlevel dielectric (ILD) deposition process yielding a high quality silicon oxide film for ILD gap fill using electron cyclotron resonance (ECR) technology. A process has been developed with biased ECR CVD to gap fill metal spaces of 0.5 μm with aspect ratios as high as 2.6 at deposition rates of approximately 6000 A/min. The effect of various ECR CVD parameters on film quality, oxide deposition rate, and ILD gap fill are explored. High silane flowrates yield high deposition rates, while low oxygen/silane ratios decrease stress and -OH content in the film. ILD gap fill of the ECR CVD process improves as RF bias increases