• DocumentCode
    236564
  • Title

    Performance and Energy Evaluation of CoMD on Intel Xeon Phi Co-processors

  • Author

    Lawson, Gary ; Sosonkina, Masha ; Yuzhong Shen

  • Author_Institution
    Dept. of Modeling, Simulation, & Visualization Eng., Old Dominion Univ., Norfolk, VA, USA
  • fYear
    2014
  • fDate
    17-17 Nov. 2014
  • Firstpage
    49
  • Lastpage
    54
  • Abstract
    Molecular dynamics simulations are used extensively in science and engineering. Co-Design Molecular Dynamics (CoMD) is a proxy application that reflects the workload characteristics of production molecular dynamics software. In particular, CoMD is computationally intensive with 90+% of execution time spent to calculate inter-atomic force potentials. Hence, this application is an ideal candidate for acceleration with the Intel Xeon Phi because it has high theoretical computational performance with low energy consumption. In this work, the kernel computing Embedded Atom model (EAM) forces is adapted to utilize the Intel Xeon Phi acceleration. Performance and energy are measured in the experiments that vary thread affinity, thread count, problem size, node count, and the number of Xeon Phi´s per node. Dynamic voltage and frequency scaling (DVFS) is used to reduce host-side power draw during Xeon Phi accelerated phases of the application. Test results are compared against the original (host-only) implementation that uses multithreading, and energy savings as high as 30% are observed.
  • Keywords
    coprocessors; molecular dynamics method; multi-threading; performance evaluation; power aware computing; CoMD; DVFS; Intel Xeon Phi acceleration; Intel Xeon Phi coprocessors; codesign molecular dynamics; dynamic voltage and frequency scaling; energy measurement; energy savings; high theoretical computational performance; host-side power draw; interatomic force potentials; kernel computing embedded atom model forces; molecular dynamic simulation; multithreading; performance measurement; production molecular dynamics software; workload characteristics; Computational modeling; Coprocessors; Force; Instruction sets; Kernel; Message systems; Microwave integrated circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Hardware-Software Co-Design for High Performance Computing (Co-HPC), 2014
  • Conference_Location
    New Orleans, LA
  • Type

    conf

  • DOI
    10.1109/Co-HPC.2014.12
  • Filename
    7017963