DocumentCode :
2365852
Title :
Implementing Root Raised Cosine (RRC) filter for WCDMA using Xilinx
Author :
Khairudin, N. ; Idros, M. F Md ; Hassan, N.A.N. ; Razak, A.H.A. ; Haron, M.A. ; Al-Junid, S.A.M.
Author_Institution :
Fac. of Electr. Eng., Univ. Teknol. MARA, Shah Alam, Malaysia
fYear :
2011
fDate :
25-27 April 2011
Firstpage :
203
Lastpage :
207
Abstract :
This paper presents implementation of Root Raised Cosine (RRC) filter at transmitter of 3G-WCDMA wireless communication by using VHDL programming language on Field Programmable Logic Array (FPGA). The main objective of this project is to reduce the inter-symbol interference (ISI) which will affect the bandwidth required for transmission the data. MATLAB 7.0 is used to design RRC filter for generating filter coefficient and checking its functionality in WDCMA transmitter. Then RRC filter coding is generated by VHDL in XILINX application and being verified in Model Sim SE 6.3f before it being synthesized using Xilinx ISE Simulator. All the results produced will be verified for make a comparison.
Keywords :
3G mobile communication; code division multiple access; field programmable gate arrays; hardware description languages; radio transmitters; radiofrequency interference; telecommunication computing; wavelength division multiplexing; 3G-WCDMA wireless communication; FPGA; MATLAB 7.0; Model Sim SE 6.3f; VHDL programming language; WDCMA transmitter; Xilinx ISE simulator; field programmable logic array; inter-symbol interference; root raised cosine filter; Analytical models; Argon; Computer languages; Delay; Encoding; Mathematical model; Table lookup; Inter-symbol Interference; Pulse Shaping; RRC Filter; Roll off Factor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Devices, Systems and Applications (ICEDSA), 2011 International Conference on
Conference_Location :
Kuala Lumpur
ISSN :
2159-2047
Print_ISBN :
978-1-61284-388-9
Type :
conf
DOI :
10.1109/ICEDSA.2011.5959095
Filename :
5959095
Link To Document :
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