• DocumentCode
    2365938
  • Title

    A novel application of polyimide-W-Al/Cu for VLSI interconnect

  • Author

    Joshi, R.V. ; Hsu, L. ; Dalal, H. ; Klymco, P. ; Jaso, M. ; Ng, H.

  • Author_Institution
    IBM Res. Div., Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • fYear
    1991
  • fDate
    11-12 Jun 1991
  • Firstpage
    75
  • Lastpage
    81
  • Abstract
    Polyimide (PI)-W-Al/Cu interconnect metallurgy for wiring is proposed for device applications. The major advantages of this structure such as the ability to use an insulator with lower dielectric constant for performance, and contact etchability (good selectivity to the bottom substrate) without damage to underlying structures is reported. It is demonstrated that chemically vapor deposited (CVD) blanket W can be deposited into high aspect ratio polyimide contacts. Subsequently is can be planarized on polyimide surface by an etchback process involving chemical and mechanical polishing. In addition, the structure is successfully applied to bipolar devices with severe topography. The specific contact resistivities of 2-4×10-8 Ω-cm 2 are realized between PtSi Schottky diodes and the proposed structure with and without inorganic underlayers. Using Si3N 4 as an inorganic sodium barrier underlayer the same contact structure is applied to field effect transistors (FET) with shallow junctions (0.1 μm-0.13 μm) and 0.6 μm poly gate (150 nm) with thin silicide (20 nm) yielding ideal device behavior. The proposed structure can be repeated to provide multilevel metallization
  • Keywords
    CVD coatings; VLSI; aluminium alloys; copper alloys; integrated circuit technology; metallisation; polymer films; tungsten; CVD blanket W; PtSi; Schottky diodes; Si3N4; VLSI interconnect; W-AlCu; bipolar devices; chemical polishing; chemically vapor deposited; contact etchability; etchback process; inorganic underlayers; mechanical polishing; multilevel metallization; polyimide/W/Al-Cu interconnect metallurgy; Chemical vapor deposition; Dielectric constant; Dielectric substrates; Dielectrics and electrical insulation; Etching; FETs; Polyimides; Surface topography; Very large scale integration; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Multilevel Interconnection Conference, 1991, Proceedings., Eighth International IEEE
  • Conference_Location
    Santa Clara, CA
  • Print_ISBN
    0-87942-673-X
  • Type

    conf

  • DOI
    10.1109/VMIC.1991.152969
  • Filename
    152969