Fast efficient algorithms for the factoring of multiple output logic functions

Author

Mathony, H.-J. ; Baitinger, U.G.

Author_Institution

Inst. of Inf. Process. Tech., Karlsruhe Univ., West Germany

fYear

1988

fDate

7-9 June 1988

Firstpage

1851

Abstract

Factoring is a technique for converting a two-level circuit description to a logical equivalent multilevel form to achieve economy or to meet fan-in and fan-out limitations of the given technology. The authors describe efficient algorithms that transform a two-level programmable-logic-array (PLA)-like representation of a logic function into a globally optimized multilevel multiple-output switching circuit by the use of algebraic factoring. They present the results of two synthesis algorithms, which show the influence of the factoring strategy on the area and delay of the resulting circuit. The algorithms are part of the CAD system FIGARO, which supports the automatic logic and physical design of finite state machines.<>

Keywords

finite automata; logic CAD; logic arrays; switching functions; CAD system FIGARO; algebraic factoring; delay; factoring strategy; finite state machines; multiple output logic functions; synthesis algorithms; Automatic logic units; Circuit synthesis; Delay; Design optimization; Integrated circuit synthesis; Logic circuits; Logic design; Logic functions; Programmable logic arrays; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1988., IEEE International Symposium on

Conference_Location

Espoo, Finland

Type

conf

DOI

10.1109/ISCAS.1988.15297

Filename

15297