DocumentCode :
2366216
Title :
Accelerating System-Level Design Tasks Using Commodity Graphics Hardware: A Case Study
Author :
Bordoloi, Unmesh D. ; Chakraborty, Samarjit
Author_Institution :
Dept. of Comput. Sci., Nat. Univ. of Singapore, Singapore
fYear :
2009
fDate :
5-9 Jan. 2009
Firstpage :
465
Lastpage :
470
Abstract :
Many system-level design tasks (e.g. timing analysis, hardware/software partitioning and design space exploration) involve computational kernels that are intractable (usually NP-hard). As a result, they involve high running times even for mid-sized problems. In this paper we explore the possibility of using commodity graphics processing units (GPUs) to accelerate such tasks that commonly arise in the electronic design automation (EDA) domain. We demonstrate this idea via a detailed case study on a general hardware/software design space exploration problem and propose a GPU-based engine for it. Not only does this problem commonly arise in the embedded systems domain, its computational kernel turns out to be a general combinatorial optimization problem (viz. the knapsack problem) which lies at the heart of several EDA applications. Our experimental results show that our GPU-based implementation offers very attractive speedups for this computational kernel (up to 100times), and speedups of up to 17times for the full problem. In contrast to ASIC/FPGA-based accelerators - since even low-end desktop and notebook computers are today equipped with GPUs - our solution involves no extra hardware cost. Although recent research has shown the benefits of using GPUs for a variety of non-graphics applications (e.g. in databases and bioinformatics), hardly any work has been done on harnessing the parallelism of GPUs to accelerate problems from the EDA domain. We hope that our results and the generality of the problem we address will motivate researchers from this community to explore the possibility of using GPUs for a wider variety of problems from the EDA domain.
Keywords :
coprocessors; electronic design automation; hardware-software codesign; optimisation; accelerating system-level design tasks; combinatorial optimization; commodity graphics hardware; commodity graphics processing units; computational kernel; electronic design automation; hardware/software design space exploration; Acceleration; Application software; Electronic design automation and methodology; Graphics; Hardware; Kernel; Software design; Space exploration; System-level design; Timing; Design Space Exploration; Electronic Design Automation (EDA); GPGPU; System-Level Design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2009 22nd International Conference on
Conference_Location :
New Delhi
ISSN :
1063-9667
Print_ISBN :
978-0-7695-3506-7
Type :
conf
DOI :
10.1109/VLSI.Design.2009.35
Filename :
4749716
Link To Document :
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