Title :
A dielectric isolated high-voltage IC-technology for off-line applications
Author :
Stoisiek, M. ; Oppermann, K.-G. ; Schwalke, U. ; Takacs, D.
Author_Institution :
Siemens Corp. Res. & Dev., Munich, Germany
Abstract :
The paper reports a first attempt to a dielectric isolated 600 V IC-process. With commercially available direct-wafer-bonded Si/SiO2 /Si-wafers we processed the isolated islands with the basic high voltage devices in a standard sub-μ fabrication line. For the lateral isolation we used a deep trench etch- and refill process. Experimental results for lateral high voltage DMOS (LDMOS), and p-MOS transistors (HVPMOS) as well as lateral IGBTs (LIGBT) and diodes are in good agreement with the target values. The suitability of the process concept for the intended applications is shown with an IGBT half-bridge demonstrator
Keywords :
insulated gate bipolar transistors; integrated circuit technology; isolation technology; monolithic integrated circuits; power MOSFET; power integrated circuits; 600 V; HVPMOS; LDMOS; LIGBT; PMOSFET; Si-SiO2-Si; deep trench etch/refill process; dielectric isolated HV IC technology; diodes; direct-wafer-bonded Si/SiO2/Si wafers; high-voltage IC technology; lateral HV DMOS devices; lateral IGBT; lateral isolation; offline applications; p-MOS transistors; standard submicron fabrication line; Breakdown voltage; Dielectric substrates; Diodes; Doping; Etching; Fabrication; Insulated gate bipolar transistors; Inverters; Research and development; Thermal resistance;
Conference_Titel :
Power Semiconductor Devices and ICs, 1995. ISPSD '95., Proceedings of the 7th International Symposium on
Conference_Location :
Yokohama
Print_ISBN :
0-7803-2618-0
DOI :
10.1109/ISPSD.1995.515058
