DocumentCode :
236744
Title :
Jitter induced voltage noise in clock channels
Author :
Fangyi Rao ; Hindi, Sammy
Author_Institution :
Agilent Technol., Inc., Santa Clara, CA, USA
fYear :
2014
fDate :
4-8 Aug. 2014
Firstpage :
63
Lastpage :
68
Abstract :
Effects of transmit jitter on lossy clock channel are analyzed analytically by treating the 1010 input clock signal as a sinusoidal wave with a phase modulation that represents jitter. Jitter-to-amplitude-modulation transfer functions are derived for sinusoidal jitter and random jitter in terms of the signal transfer function or S-parameters. Input jitter is shown to induce amplitude modulation in the output signal as a result of channel dispersion, leading to voltage noise at the channel output. RJ induced voltage noise is found to scale uniquely with channel loss. To verify the theory, numerical simulations are performed on channels with different losses and at various data rates. The input clock signal is represented with a square wave, and the output signal is calculated by linear superposition of the channel step response. Theoretical and simulation results are found to be in excellent agreement.
Keywords :
S-parameters; clocks; jitter; numerical analysis; phase modulation; transfer functions; S-parameters; channel loss; clock channels; jitter induced voltage noise; jitter-to-amplitude-modulation transfer functions; linear superposition; numerical simulations; phase modulation; random jitter; signal transfer function; sinusoidal jitter; sinusoidal wave; Clocks; Equations; Harmonic analysis; Jitter; Noise; Transfer functions; Voltage measurement; amplitude modulation; jitter; loss; voltage noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electromagnetic Compatibility (EMC), 2014 IEEE International Symposium on
Conference_Location :
Raleigh, NC
Print_ISBN :
978-1-4799-5544-2
Type :
conf
DOI :
10.1109/ISEMC.2014.6898944
Filename :
6898944
Link To Document :
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