Tungsten plug-in wiring structure for high density three dimensional devices

A new plug-in wiring structure (PWS) is proposed for higher packing density three dimensional (3D) devices. The PWS features deep via-holes that penetrate active regions of SOI layers, and make contacts at the side of them. The DUAL-CMOS(Dual Active Device Layer CMOS) SRAM cell with the PWS realized 56% cell area of that of bulk-Si CMOS and 70% of that of DUAL-CMOS using conventional wiring structure. The PWS used hydrogen reduction blanket CVD-W film on TiW/Ti or TiW adhesion layer. Via-holes for the PWS and other conventional via-holes were filled by CVD-W simultaneously. When TiW/Ti adhesion layer was used, ohmic side wall contacts to p⁺ poly-Si for PWS were formed with specific contact resistance of 50.4 ohms.μm² for 0.6 μmφ contacts. Device operation using the PWS was successfully demonstrated with DUAL-CMOS ring oscillators. The propagation delay time was 420 psec/stage, which was approximately 10% faster than DUAL-CMOS ring oscillators without the PWS