DocumentCode :
2367646
Title :
Investigation of turn-on speeds of electrostatic discharge protection devices using transmission-line pulsing technique
Author :
Huo, M.X. ; Han, Y. ; Dong, S.R. ; Liou, J.J. ; Ding, K.B. ; Du, X.Y. ; Cui, Q. ; Huang, D.H.
Author_Institution :
Dept. of Inf. Sci. & Electron. Eng., Zhejiang Univ., Hangzhou
fYear :
2008
fDate :
24-27 March 2008
Firstpage :
601
Lastpage :
606
Abstract :
As process technologies advance into deep sub-micrometer and nanometer scale, the charged device model (CDM) is now considered an important stress model for defining electrostatic discharge (ESD) reliability of integrated circuits. Thus the turn-on time of the ESD elements used in the protection circuit becomes important. At this time, there is no good method to evaluate the CDM ESD device turn-on speed. Equipment like VF-TLP and CC-TLP are too complicated and not precise for this purpose. A new method to evaluate the ESD device turn-on speed is presented in this paper. Based on this novel approach, some CDM ESD devices are analyzed based on the transmission line pulsing (TLP) tester. The designed devices include diodes, grounded-gate NMOS, SCRpsilas (silicon controlled rectifier), and Modified-Lateral SCRpsilas (MLSCR). The rising time of the pulse is set at 200 psec to accurately simulate real CDM pulses. The time-dependent voltage and current data are extracted and calculated from each pulse in the Time Domain Reflection (TDR) TLP tester. Two new ESD turn-on conditions are proposed and defined based on the transient currents in order to compare the relative speed of different ESD devices. The results show that the normalized turn-on time of different devices with various sizes and finger numbers do not correlate well with that obtained under the normal DC conditions, and the same device shows different turn-on characteristics under different pulses. These results enable devices to be designed for improved CDM ESD protection levels, and the present method can be used for ESD design for future nanometer technologies.
Keywords :
electrostatic discharge; integrated circuit reliability; nanotechnology; time-domain analysis; transmission lines; SCR; diodes; electrostatic discharge protection devices; electrostatic discharge reliability; grounded-gate NMOS; integrated circuits; nanometer technologies; silicon controlled rectifier; time domain reflection; transmission-line pulsing technique; Diodes; Electrostatic discharge; Integrated circuit modeling; Integrated circuit reliability; Integrated circuit technology; Nanoscale devices; Protection; Stress; Testing; Transmission lines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanoelectronics Conference, 2008. INEC 2008. 2nd IEEE International
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-1572-4
Electronic_ISBN :
978-1-4244-1573-1
Type :
conf
DOI :
10.1109/INEC.2008.4585559
Filename :
4585559
Link To Document :
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