DocumentCode :
2367668
Title :
An enhanced test generator for capacitance induced crosstalk delay faults
Author :
Sinha, Arani ; Gupta, Sandeep K. ; Breuer, Melvin A.
Author_Institution :
Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
fYear :
2003
fDate :
16-19 Nov. 2003
Firstpage :
174
Lastpage :
177
Abstract :
Capacitive crosstalk can give rise to slowdown of signals that can propagate to a circuit output and create a functional error A test generation methodology, called XGEN, was developed to generate tests for such failures. Two drawbacks of XGEN are: (i) it is not complete because of restricted propagation conditions, and (ii) a constrained logic value system is used. In this paper, we relax the propagation conditions to increase the solution space. This increases the likelihood of finding a test. We also present a nine-valued algebra that distinguishes between hazardous values and non-hazardous values. Finally, we use the relation between arrival time and required time ranges to selectively turn off the timing computation procedure which is computationally expensive. Other drawbacks of previous versions of XGEN are: (i) a simplified pin-to-pin delay model was used, and (ii) crosstalk computation could not handle timing ranges. We have addressed both of those issues.
Keywords :
automatic test pattern generation; capacitance; combinational circuits; crosstalk; fault simulation; logic simulation; logic testing; timing; tree searching; XGEN; adjacent interconnects; branch and bound strategy; capacitance induced faults; combinational logic circuits; constrained logic value system; crosstalk delay faults; crosstalk noise; dynamic hazard; enhanced test generator; functional error; logic algebra; pin-to-pin delay model; restricted propagation conditions; solution space; timing ranges; timing simulation; Algebra; Capacitance; Circuit faults; Circuit testing; Combinational logic circuits; Crosstalk; Integrated circuit interconnections; Logic circuit testing; Logic testing; Propagation delay; System testing; Timing; Tree searching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2003. ATS 2003. 12th Asian
ISSN :
1081-7735
Print_ISBN :
0-7695-1951-2
Type :
conf
DOI :
10.1109/ATS.2003.1250805
Filename :
1250805
Link To Document :
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