DocumentCode :
2367845
Title :
Extracting precise diagnosis of bridging faults from stuck-at fault information
Author :
Arslan, Baris ; Orailoglu, Alex
Author_Institution :
Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA
fYear :
2003
fDate :
16-19 Nov. 2003
Firstpage :
230
Lastpage :
235
Abstract :
Although the stuck-at fault model is the standard fault model. the frequently occurring faults in some technologies arc unintentional shorts, denoted as bridging faults. We outline a method that utilizes the information from the stuck-at fault model to accurately diagnose the bridging faults that affect two lines. The proposed method exploits the observation that the bridging fault response matches the stuck-at fault responses on the shorted lines for the failing test vectors and generates a candidate list that accounts for all failures. A further reduction in the size of the candidate set is achieved by extracting information from the test vectors that do not fail. The proposed method uses no layout information whatsoever. Nonetheless, the experimental results indicate that the bridging faults can be accurately diagnosed delivering a reduction in the sizes of the ambiguity sets and full capture of the offending bridging fault.
Keywords :
fault simulation; logic testing; HOPE fault simulation tool; bridging faults; candidate list; failing test vectors; fault dictionaries; fault response; precise diagnosis; shorted lines; stuck-at fault model; Bridge circuits; CMOS technology; Circuit faults; Circuit testing; Data mining; Fault detection; Fault diagnosis; Logic circuit testing; Manufacturing processes; Process design; Semiconductor device modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2003. ATS 2003. 12th Asian
ISSN :
1081-7735
Print_ISBN :
0-7695-1951-2
Type :
conf
DOI :
10.1109/ATS.2003.1250815
Filename :
1250815
Link To Document :
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