DocumentCode
2367965
Title
A novel method for online in-place detection and location of multiple interconnect faults in SRAM based FPGAs
Author
Kumar, L. Kalyan ; Mupid, Amol J. ; Ramani, Aditya S. ; Kamakoti, V.
Author_Institution
Indian Inst. of Technol. - Madras, Chennai, India
fYear
2003
fDate
16-19 Nov. 2003
Firstpage
262
Lastpage
265
Abstract
This paper describes a novel method for online in-place detection and location of interconnects faults in SRAM-based FPGA systems. In safety critical systems like space probes, online checkers report misbehavior of sub-circuits within the system. When one such sub-circuit is reported to misbehave, the algorithm proposed in this paper performs run time reconfiguration (RTR) of LUTs in an attempt to detect and locate the interconnect faults, if any, within the faulty sub-circuit. Even in the subcircuit under test, at any given time, only a small section of the LUTs are used by the testing procedure. In this way the degradation of the application is kept at a minimum. The proposed algorithm is in-place, i.e. it does not alter the routing structure of the application.
Keywords
SRAM chips; fault diagnosis; field programmable gate arrays; logic testing; table lookup; LUT; SRAM based FPGA; inverse pass mode; multiple interconnect faults; normal pass mode; online in-place detection; online in-place location; run time reconfiguration; safety critical systems; space probes; stuck faults; Fault detection; Fault diagnosis; Field programmable gate arrays; Logic circuit testing; Logic programming; Logic testing; Probes; Random access memory; Routing; SRAM chips; Safety; Space technology; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2003. ATS 2003. 12th Asian
ISSN
1081-7735
Print_ISBN
0-7695-1951-2
Type
conf
DOI
10.1109/ATS.2003.1250820
Filename
1250820
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