DocumentCode
2368057
Title
Analysis of boron pile-up at the Si-SiO2 interface using 2-D process and device simulation
Author
Hyodo, T. ; Taji, S. ; Yoshida, N. ; Kameda, M. ; Watanabe, H. ; Shiota, I.
Author_Institution
LSI Res. & Dev. Center, Ricoh Co. Ltd., Osaka, Japan
fYear
1996
fDate
2-4 Sept. 1996
Firstpage
87
Lastpage
88
Abstract
An accurate channel doping profile calculated by a process simulator is essential to the prediction of MOSFET threshold voltage (Vth). However it can not be easily calibrated to measurements, since SIMS which is believed to be the most accurate profiling technique at present, has ±10% error on the depth scale, ±15% on the concentration scale. Moreover measured concentrations in the near-surface region are not reliable. In this study the correction method for SIMS profile is presented. Also by using well-calibrated channel doping profiles, the boron pile-up layer situated on the Si side of the Si-SiO2 interface is analyzed.
Keywords
MOSFET; doping profiles; elemental semiconductors; secondary ion mass spectroscopy; semiconductor device models; semiconductor doping; semiconductor process modelling; semiconductor-insulator boundaries; silicon; silicon compounds; 2-D process simulation; MOSFET threshold voltage; SIMS; Si-SiO2; channel doping profile; near-surface region; pile-up; profiling technique; Analytical models; Boron; Density measurement; Doping profiles; FETs; Large scale integration; Performance evaluation; Predictive models; Shape measurement; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation of Semiconductor Processes and Devices, 1996. SISPAD 96. 1996 International Conference on
Print_ISBN
0-7803-2745-4
Type
conf
DOI
10.1109/SISPAD.1996.865285
Filename
865285
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