• DocumentCode
    2368117
  • Title

    Non-scan design for testability for mixed RTL circuits with both data paths and controller via conflict analysis

  • Author

    Xiang, Dong ; Gu, Shan ; Fujiwara, Hideo

  • Author_Institution
    Sch. of Software, Tsinghua Univ., Beijing, China
  • fYear
    2003
  • fDate
    16-19 Nov. 2003
  • Firstpage
    300
  • Lastpage
    303
  • Abstract
    A non-scan design for testability method for RTL circuits based on conflict analysis is proposed. Conflict analysis is presented based on a new 5-valued system to estimate testability of data paths. New test point structures for RTL circuit design for testability are introduced. Nonscan design for testability is proposed based on conflict resolution. Unlike most of the previous methods, our method considers testability of data paths and the controller simultaneously. Different classes of test points can be inserted into data paths and the controller. Intensive techniques are presented to connect extra inputs of test points with PI ports, which avoids generating reconvergent fanouts that cause new conflicts.
  • Keywords
    data analysis; design for testability; integrated circuit design; integrated circuit testing; logic design; logic testing; multivalued logic; PI ports; RTL circuit design for testability; conflict analysis; conflict resolution; controller; controller testability; data path testability; five-valued system; mixed RTL circuits; nonscan design for testability method; reconvergent fanouts; test point classes; test point structures; Circuit testing; Design for testability; Integrated circuit design; Integrated circuit testing; Logic circuit testing; Logic design; Multivalued logic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 2003. ATS 2003. 12th Asian
  • ISSN
    1081-7735
  • Print_ISBN
    0-7695-1951-2
  • Type

    conf

  • DOI
    10.1109/ATS.2003.1250827
  • Filename
    1250827