Title :
Universal guiding principle for the fabrication of highly scalable MONOS-type memory -atomistic recipes based on designing interface oxygen chemical potential-
Author :
Yamaguchi, K. ; Otake, A. ; Kamiya, K. ; Shigeta, Y. ; Shiraishi, K.
Author_Institution :
Grad. Sch. of Pure & Appl. Sci., Univ. of Tsukuba, Tsukuba, Japan
Abstract :
For the fabrication of highly scalable metal-oxide-nitride-oxide-semiconductor (MONOS) type memories, we propose a universal guiding principle, where the interfacial O chemical potential is designed to prevent the formation of defects that undergo irreversible structural changes. Our first principles calculations indicate that O-related defects in SiN charge trap layers in a MONOS-type memory intrinsically cause the local collapse of the SiN layer and memory degradation. These features originate from the existence of a large number of metastable structures, which can readily appear with program/erase cycles or thermal activation. To overcome this issue, we propose a skilful and realistic recipe to prevent O incorporation into SiN layers: an insert of a thin Si layer into the SiO2 layer near SiO2/SiN interface. This fabrication process leads to drastic lowering of O chemical potential in the interface. Moreover, the present proposal is a general and universal guiding principle to synthesize the sharp and high quality oxide interfaces which are necessary to form aggressively downsized devices.
Keywords :
charge-coupled devices; chemical potential; particle traps; random-access storage; wide band gap semiconductors; charge trap layers; highly scalable MONOS-type memory; interface oxygen chemical potential; universal guiding principle;
Conference_Titel :
Electron Devices Meeting (IEDM), 2010 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4424-7418-5
Electronic_ISBN :
0163-1918
DOI :
10.1109/IEDM.2010.5703305