Minimizing defective part level using a linear programming-based optimal test selection method

Author

Tian, Yuxin ; Grimaila, Michael R. ; Shi, Weiping ; Mercer, M. Ray

Author_Institution

Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA

fYear

2003

fDate

16-19 Nov. 2003

Firstpage

354

Lastpage

359

Abstract

Recent probabilistic test generation approaches have proven that detecting single stuck-at-faults multiple times is effective at reducing the defective part level (DPL). Unfortunately, these test generation strategies increase the number of test patterns. In this paper, we present a novel linear programming-based method to accelerate the optimal selection of test sets to minimize the defective part level based upon the MPG-D model. Our experimental results show that the proposed method is on average 300 times faster than the existing test pattern selection method.

Keywords

automatic test pattern generation; integrated circuit testing; integrated circuit yield; linear programming; logic testing; ATPG; DO-RE-ME test generation method; DPL; MPG-D model; defective part level minimization; linear programming; optimal test selection method; probabilistic test generation methods; stuck-at-faults; test pattern selection; Automatic test pattern generation; Circuit faults; Circuit testing; Electrical fault detection; Electronic mail; Integrated circuit testing; Linear programming; Logic circuit testing; Mathematical model; Page description languages; Test pattern generators; Yield estimation;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 2003. ATS 2003. 12th Asian

ISSN

1081-7735

Print_ISBN

0-7695-1951-2

Type

conf

DOI

10.1109/ATS.2003.1250836

Filename

1250836