Title :
A system-level alternate test approach for specification test of RF transceivers in loopback mode
Author :
Halder, Abhishek ; Bhattacharya, S. ; Srinivasan, G. ; Chatterjee, A.
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
In this paper, a loop-back test scheme for RF transceivers using optimized periodic bit streams is presented. In this approach, optimized periodic bitstreams modulated at baseband are sent through RF transmit subsystem, and the transmitter output is looped back into the receiver using the proposed test architecture. The corresponding test response is captured in the baseband at the output of the receive subsystem. From the spectral content of the test response at the baseband, all the linear and the nonlinear specifications of the transmit and the receive subsystems are computed. The key contribution of the presented work is that, the subsystem specification values are decoupled and computed using the looped-back test response at the receiver baseband. This eliminates the need for expensive RF ATE instrumentation to probe high frequency access points. Hardware measurement and validation data for a 900MHz wireless GSM transceiver system are presented.
Keywords :
automatic testing; cellular radio; integrated circuit testing; mixed analogue-digital integrated circuits; telecommunication equipment testing; transceivers; 900 MHz; RF transceivers; RF transmit subsystem; analog test; baseband modulation; linear specifications; loop-back test; loopback mode; mixed-signal test; nonlinear specifications; optimized periodic bit streams; receive subsystems; specification test; spectral content; subsystem specification values; system-level alternate test; test response; wireless GSM transceiver system; Baseband; Computer architecture; GSM; Hardware; Instruments; Probes; Radio frequency; System testing; Transceivers; Transmitters; Analog and mixed-signal test; Loop-back test; RF test; Specification test; System-level test; wireless transceiver test;
Conference_Titel :
VLSI Design, 2005. 18th International Conference on
Conference_Location :
Kolkata, India
Print_ISBN :
0-7695-2264-5
DOI :
10.1109/ICVD.2005.34