DocumentCode :
2368439
Title :
A 160 MSPS 8-bit pipeline based ADC
Author :
Haider, Shahid ; Ghosh, Arindrajit ; Prasad, Ravi Sankar ; Anirban Chatierjeee ; Banerjee, Swapna
Author_Institution :
IHP-Germany, Frankfurt, Germany
fYear :
2005
fDate :
3-7 Jan. 2005
Firstpage :
313
Lastpage :
318
Abstract :
This paper presents an 8-bit 160-MS/s pipeline analog-to-digital converter using 0.25-micrometer double poly BiCMOS technology of which the total power dissipation is 135mW with 3.3V of analog power supply. The input signal is assumed to be IV. Double sampling technique is used to increase the sampling speed. The sub-circuits are optimized in terms of power and speed. It achieves differential nonlinearity and integral nonlinearity of ±0.65 LSB and ±0.8 LSB and an estimated area of 1.60mm2.
Keywords :
BiCMOS integrated circuits; analogue-digital conversion; comparators (circuits); pipeline processing; sample and hold circuits; 135 mW; 3.3 V; 8 bits; analog power supply; comparator; double poly BiCMOS technology; double sampling sample-and-hold; multiplying digital-to-analog converter; pipeline architecture; power dissipation; Analog-digital conversion; BiCMOS integrated circuits; Capacitors; Digital-analog conversion; Pipelines; Power dissipation; Power supplies; Quantization; Sampling methods; Signal sampling; Comparator; Double sampling Sample-and-Hold; Multiplying digital-to-analog converter; Pipeline architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2005. 18th International Conference on
ISSN :
1063-9667
Print_ISBN :
0-7695-2264-5
Type :
conf
DOI :
10.1109/ICVD.2005.7
Filename :
1383294
Link To Document :
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