Title :
Capacitance investigation of diodes and SCRs for ESD protection of high frequency circuits in sub-100nm bulk CMOS technologies
Author :
Junjun Li ; Gauthier, R. ; Chatty, K. ; Mitra, Subhasish ; Hongmei Li
Author_Institution :
IBM Semicond. Res. & Dev. Center, Essex Junction
Abstract :
S-parameter test structures show total capacitances per perimeter of ESD diodes increased from ~0.42fF/mum in 90nm technologies to ~0.7fF/mum in 65nm and 45nm technologies. To achieve lower capacitances for high frequency circuits, layout and process optimization are needed. SCR devices from a 45nm technology show ~0.32fF/mum and can be used for circuit applications with stringent capacitance requirement. Two different BEOL wiring schemes are investigated for optimized metal coupling capacitance.
Keywords :
CMOS integrated circuits; S-parameters; capacitance; diodes; electrostatic discharge; thyristors; ESD protection; S-parameter test structures; SCR; bulk CMOS technologies; capacitance investigation; diodes; high frequency circuits; optimized metal coupling capacitance; size 100 nm; size 45 nm; size 65 nm; size 90 nm; stringent capacitance requirement; CMOS technology; Capacitance; Circuit testing; Diodes; Electrostatic discharge; Frequency; Protection; Scattering parameters; Thyristors; Wiring;
Conference_Titel :
29th Electrical Overstress/Electrostatic Discharge Symposium, 2007. EOS/ESD
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-58537-136-5
DOI :
10.1109/EOSESD.2007.4401760
