DocumentCode :
2368575
Title :
Test resource partitioning based on efficient response compaction for test time and tester channels reduction
Author :
Han, Yinhe ; Xu, Yongjun ; Li, Huawei ; Li, Xiaowei ; Chandra, Anshuman
Author_Institution :
Inst. of Comput. Technol., Acad. Sinica, Beijing, China
fYear :
2003
fDate :
16-19 Nov. 2003
Firstpage :
440
Lastpage :
445
Abstract :
This paper presents a test resource partitioning technique based on an efficient single-output response compaction design called quotient compactor (q-Compactor). Some design theorems of quotient compactor are presented to achieve full diagnostics ability, minimize error cancellation and handle the X bits in the outputs of the CUT The quotient compactor can also be moved to the load-board to reduce the number of ATE channels required. Our experimental results on the ISCA S89 benchmark circuits and an MPEG 2 decoder SOC show that the proposed compaction scheme is very efficient.
Keywords :
automatic test pattern generation; built-in self test; combinational circuits; data compression; integrated circuit testing; logic testing; system-on-chip; ATE; FPGA; benchmark circuits; decoder SOC; efficient response compaction; full diagnostics ability; quotient compactor; single-output response compaction design; test resource partitioning technique; test time reduction; tester channels reduction; Benchmark testing; Circuit testing; Combinational logic circuits; Compaction; Computers; Content addressable storage; Costs; Data compression; Decoding; Frequency; Integrated circuit testing; Logic circuit testing; Pins; Self-testing; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2003. ATS 2003. 12th Asian
ISSN :
1081-7735
Print_ISBN :
0-7695-1951-2
Type :
conf
DOI :
10.1109/ATS.2003.1250852
Filename :
1250852
Link To Document :
بازگشت