10 kV, 5A 4H-SiC Power DMOSFET

In this paper, we report 4H-SiC power DMOSFETs capable of blocking 10 kV. The devices were scaled up to 5 A, which is a factor of 25 increase in device area compared to the previously reported value. The devices utilized 100 mum thick n-type epilayers with a doping concentration of 6 times 10¹⁴ cm^-3 for drift layers, and a floating guard ring based edge termination structure was used. The gate oxide layer was formed by thermal oxidation at 1175 degC, followed by an NO anneal. A peak effective channel mobility of 13 cm²/Vs was extracted from a test MOSFET with a W/L of 150 mum / 150 mum, built adjacent to the power DMOSFETs. A 4H-SiC DMOSFET with an active area of 0.15 cm showed a specific on-resistance of 111 mOmega-cm² at room temperature with a gate bias of 15 V. The device shows a leakage current of 3.3 muA, which corresponds to a leakage current density of 11 muA-cm^-2 at a drain bias of 10 kV