Title :
Dose Designing and Fabrication of 4H-SiC Double RESURF MOSFETs
Author :
Noborio, M. ; Suda, J. ; Kimoto, T.
Author_Institution :
Dept. of Electron. Sci. & Eng., Kyoto Univ.
Abstract :
Designing and fabrication of 4H-SiC (0001) lateral MOSFETs with a double reduced surface field (RESURF) structure have been investigated to reduce a drift resistance. In order to achieve high breakdown voltage, a two-zone RESURF structure was also employed in addition to the double RESURF structure. After device simulation for dose optimization, 4H-SiC two-zone double RESURF MOSFETs have been fabricated by using an original self-aligned process proposed in this paper. The fabricated MOSFETs with optimum doses exhibit a high breakdown voltage of 1380 V and a low on-resistance of 66 mOmegam2 (including a drift resistance of 13 mOmegacm2). The drift resistance in the fabricated MOSFETs with double RESURF structure is only 50 % or even lower than that in the MOSFETs with a normal RESURF structure. The figure-of-merit (VB2/RON) of the present device reaches 29 MW/cm2, which is the best performance among any lateral MOSFETs ever reported
Keywords :
power MOSFET; semiconductor device breakdown; semiconductor device models; silicon compounds; wide band gap semiconductors; 1380 V; H-SiC; RESURF structure; breakdown voltage; device simulation; dose designing; dose optimization; double RESURF MOSFET; double reduced surface field structure; Breakdown voltage; Design engineering; Desktop publishing; Electric breakdown; FETs; Fabrication; MOSFETs; Power integrated circuits; Silicon carbide; Substrates;
Conference_Titel :
Power Semiconductor Devices and IC's, 2006. ISPSD 2006. IEEE International Symposium on
Conference_Location :
Naples
Print_ISBN :
0-7803-9714-2
DOI :
10.1109/ISPSD.2006.1666124