Title :
A study of ESD robustness of cascoded NMOS driver
Author :
Suzuki, Teruo ; Kojima, Masayoshi ; Iwahori, Junji ; Morita, Teruo ; Isomura, Nobuyoshi ; Hashimoto, Kenji ; Yokota, Noboru
Author_Institution :
Fujitsu VLSI Ltd., Aichi
Abstract :
The failure voltage of cascoded drivers in IO cells is influenced most by the bottom NMOS. The failure voltage improves if the gate is tied to ground. A solution with only one additional transistor to increase the failure voltage of a level-shifter circuit with cascoded NMOS drivers is presented.
Keywords :
MOS integrated circuits; electrostatic discharge; failure analysis; ESD robustness; IO cells; cascoded NMOS driver; electrostatic discharge protection circuit; failure voltage; level-shifter circuit; Atherosclerosis; Circuit testing; Driver circuits; Electrostatic discharge; Large scale integration; MOS devices; Protection; Robustness; Silicides; Voltage;
Conference_Titel :
29th Electrical Overstress/Electrostatic Discharge Symposium, 2007. EOS/ESD
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-58537-136-5
DOI :
10.1109/EOSESD.2007.4401779
