DocumentCode
2368884
Title
An amorphous-silicon thin-film transistor model including variable resistance effect
Author
Tanizawa, M. ; Kikuta, S. ; Nakagawa, N. ; Ishikawa, K. ; Kotani, N. ; Miyoshi, H.
Author_Institution
ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
fYear
1996
fDate
2-4 Sept. 1996
Firstpage
181
Lastpage
182
Abstract
A new analytical drain current model including variable series resistance for the a-Si:TFT is presented. Results calculated by the model show very good agreement with experimental results for all operating bias conditions and indicate the scalability over different device geometries.
Keywords
amorphous semiconductors; electric resistance; elemental semiconductors; semiconductor device models; silicon; thin film transistors; Si; TFT; device geometries; drain current model; model; operating bias conditions; scalability; series resistance; thin-film transistor; variable resistance effect; Analytical models; Circuit simulation; Conductivity; Electric resistance; Equations; Liquid crystal displays; Semiconductor diodes; Temperature distribution; Thin film transistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation of Semiconductor Processes and Devices, 1996. SISPAD 96. 1996 International Conference on
Print_ISBN
0-7803-2745-4
Type
conf
DOI
10.1109/SISPAD.1996.865329
Filename
865329
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