High-mobility 0.85nm-EOT Si0.45Ge0.55-pFETs: Delivering high performance at scaled VDD

This work demonstrates the successful integration of 0.85nm-EOT Si_0.45Ge_0.55-pFETs using a gate first approach. An in-depth analysis, ranging from capacitor-level up to circuit-level is carried out, with systematic benchmarking to a conventional Si-channel reference. Outperforming the state-of-the-art Si_0.55Ge_0.45-pFETs, an I_ON of 630μA/μm at L_{G_POLY} = 35nm with I_OFF = 100nA/μm and V_DD = -1V has been achieved without any epi-S/D boosters. Significant improvements at lower V_DD have also been confirmed through complex circuit simulations and validated by experimental results.