Title :
Wide Voltage Power Device implementation in O.25 μm SOI BiC-DMOS
Author :
Nitta, T. ; Yanagi, S. ; Miyajima, T. ; Furuya, K. ; Otsu, Y. ; Onoda, H. ; Hatasako, K.
Author_Institution :
Renesas Technol. Corp., Hyogo
Abstract :
In this paper, a new SOI BiC-DMOS process based on the 0.25mum CMOS process is introduced. SOI and dielectric isolation enables implementation of wide voltage and various types of lateral power devices. For Nch devices, 40V/60V/ 80V/100V/170V LDMOS and 170V/200V lateral IGBT were developed. The drift layers of LDMOS are optimized respectively. The 0.25mum CMOS process helps not only to shrink low voltage class devices such as 40V LDMOS but also to improve the SOA characteristics of high voltage devices
Keywords :
dielectric properties; insulated gate bipolar transistors; power semiconductor devices; silicon-on-insulator; 0.25 micron; 100 V; 170 V; 200 V; 40 V; 60 V; 80 V; CMOS process; SOI BiC-DMOS process; dielectric isolation; drift layers; lateral IGBT; power device implementation; silicon-on-insulator; Auditory displays; Automotive engineering; Breakdown voltage; CMOS process; CMOS technology; Costs; Insulated gate bipolar transistors; Low voltage; Power engineering and energy; Wafer bonding;
Conference_Titel :
Power Semiconductor Devices and IC's, 2006. ISPSD 2006. IEEE International Symposium on
Conference_Location :
Naples
Print_ISBN :
0-7803-9714-2
DOI :
10.1109/ISPSD.2006.1666141
