DocumentCode
236898
Title
Monitoring transistor degradation in power inverters through pole shifts
Author
Hayes, Jane Huffman ; Hubing, Todd H.
Author_Institution
Dept. of Electr. & Comput. Eng., Clemson Univ., Clemson, SC, USA
fYear
2014
fDate
4-8 Aug. 2014
Firstpage
465
Lastpage
469
Abstract
In a power inverter configuration with pull-up and pull-down transistors, ringing that occurs on the high-to-low and low-to-high transitions can be used to track aging and predict failures. As the transistors age or are damaged, changes in their equivalent resistance and capacitance can affect the frequency and damping factor of the characteristic ringing detected on the inverter´s output. The Matrix Pencil Method can be used to locate the poles associated with this ringing and detect shifts in position that indicate transistor degradation.
Keywords
MOSFET; equivalent circuits; invertors; poles and zeros; damping factor; matrix pencil method; pole shifts; power inverters; pull-down transistors; pull-up transistors; ringing equivalent circuit; transistor degradation; Aging; Capacitance; Damping; Degradation; Electrostatic discharges; Inductance; Transistors; Failure Prediction Introduction; Matrix Pencil Method; Ringing; Transistor Degradation;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility (EMC), 2014 IEEE International Symposium on
Conference_Location
Raleigh, NC
Print_ISBN
978-1-4799-5544-2
Type
conf
DOI
10.1109/ISEMC.2014.6899017
Filename
6899017
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