DocumentCode
2369059
Title
A novel multi deposition multi room-temperature annealing technique via Ultraviolet-Ozone to improve high-K/metal (HfZrO/TiN) gate stack integrity for a gate-last process
Author
Wu, L. ; Yew, K.S. ; Ang, D.S. ; Liu, W.J. ; Le, T.T. ; Duan, T.L. ; Hou, C.H. ; Yu, X.F. ; Lee, D.Y. ; Hsu, K.Y. ; Xu, J. ; Tao, H.J. ; Cao, M. ; Yu, H.Y.
Author_Institution
Sch. of EEE, Nanyang Technol. Univ., Singapore, Singapore
fYear
2010
fDate
6-8 Dec. 2010
Abstract
ALD HfZrO high-K fabricated by novel multi deposition multi annealing (MDMA) technique at room temperature in Ultraviolet-Ozone (UVO) ambient is systematically investigated for the first time via both physical and electrical characterization. As compared to the reference gate stack treated by conventional rapid thermal annealing (RTA) @ 600°C for 30 s (with PVD TiN electrode), the devices receiving MDMA in UVO demonstrates: 1) more than one order of magnitude leakage reduction without EOT penalty at both room temperature and an elevated temperature of 125°C; 2) much improved stress induced degradation in term of leakage increase and flat band voltage shift (both room temperature and 125°C); 3) enhanced dielectrics break-down strength and time-dependent-dielectric-breakdown (TDDB) life time. The improvement strongly correlates with the cycle number of deposition and annealing (D&A, while keeping the total annealing time and total dielectrics thickness as the same). Scanning tunneling microscopy (STM) and X-ray photoelectron spectroscopy (XPS) analysis suggest both oxygen vacancies (Vo) and grain boundaries suppression in the MDMA treated samples are likely responsible for the device improvement. The novel room temperature UVO annealing is promising for the gate stack technology in a gate last integration scheme.
Keywords
X-ray photoelectron spectra; rapid thermal annealing; semiconductor device manufacture; PVD electrode; RTA; STM; Scanning tunneling microscopy; X-ray photoelectron spectroscopy analysis; XPS; electrical characterization; enhanced dielectrics break-down strength; gate-last process; high-K/metal gate stack integrity; multi deposition multi room-temperature annealing technique; physical characterization; rapid thermal annealing; temperature 125 C; temperature 600 C; time 30 s; time-dependent-dielectric-breakdown life time; ultraviolet-ozone;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 2010 IEEE International
Conference_Location
San Francisco, CA
ISSN
0163-1918
Print_ISBN
978-1-4424-7418-5
Electronic_ISBN
0163-1918
Type
conf
DOI
10.1109/IEDM.2010.5703343
Filename
5703343
Link To Document