Title :
Non-Manhattan routing using a Manhattan router
Author :
Hursey, Edward ; Jayakumar, Nikhil ; Khatri, Sunil P.
Author_Institution :
Dept. of ECE, Colorado Univ., Boulder, CO, USA
Abstract :
In deep sub-micron (DSM) designs, wire delays comprise a significant fraction of the total delay of a design. Therefore, techniques such as non-Manhattan routing, which reduce the total wire length of a design, are highly relevant for today´s designs. However, a great deal of effort has gone into the design and development of algorithms to perform Manhattan routing, both in industry and in academia. Therefore, it would be desirable to use existing Manhattan algorithms and tools to perform non-Manhattan routing. In this paper, we describe a technique to perform non-Manhattan routing by combining the results of two related Manhattan routing instances. The second routing instance is derived from the first by rotating the coordinate system by 45°. As a result, the Manhattan routes that are computed for the second instance are actually 45 ° rotated in the original coordinate system. We combine the results of the two instances to obtain a final routing result that contains non-Manhattan routes. We demonstrate that our router produces highly efficient results, reducing the total wire length by an average 9.8% over a traditional router, with a via-count increase of 2%.
Keywords :
VLSI; integrated circuit design; integrated circuit interconnections; network routing; Manhattan algorithms; Manhattan router; deep sub micron designs; nonManhattan routing; wire delays; wire length; Algorithm design and analysis; Clocks; Counting circuits; Delay systems; Pins; Research and development; Routing; Very large scale integration; Wire; Wiring;
Conference_Titel :
VLSI Design, 2005. 18th International Conference on
Print_ISBN :
0-7695-2264-5
DOI :
10.1109/ICVD.2005.124