A novel specification based test pattern generation using genetic algorithm and wavelets

For analog and mixed signal circuits, the traditional tests are time consuming and also most expensive in terms of both test development and test implementation costs. So for testing these ICs new testing strategies are investigated. In this paper, a novel test generation methodology for the detection of faults in analog cores is proposed. A transient signal is taken as input stimulus for the circuit under test and the output response is analysed using wavelets. Specifications of the circuit are mapped to the performance space and the specifications are checked implicitly. The proposed fault oriented test generator also computes the optimal test patterns based on genetic algorithm.