Design of a current mode 6-bit 100 MS/s flash A/D converter with 0.75 pJ/conv-lev FoM

The design of a low-power 6-bit flash A/D converter with state-of-the-art figure of merit for flash architectures is presented. The target resolution with the lowest power consumption is achieved by using the voltage-to-current conversion strategy. The sampling frequency is 100 MHz and the proposed converter is able to work with an input signal frequency very close to Nyquist rate. Considering that the analog and the digital supply voltages are 1.8 V and 0.9 V, respectively, the achieved figure of merit is equal to 0.75 pJ/conv.