DocumentCode :
2369701
Title :
Second harmonic 60-GHz power amplifiers in 130-nm CMOS
Author :
Wernehag, Johan ; Sjöland, Henrik
Author_Institution :
Lund Univ., Lund
fYear :
2007
fDate :
2-5 July 2007
Firstpage :
149
Lastpage :
152
Abstract :
Two different frequency doubling power amplifier topologies have been compared, one with differential input and one with single-ended, both with single-ended output at 60 GHz. The frequency doubling capability is valuable from at least two perspectives, 1) the high frequency signal is on the chip as little as possible 2) the voltage controlled oscillator and power amplifier are at different frequencies easing the isolation of the two in a transceiver. The topologies have been simulated in a 1p8M 130-nm CMOS process. The resonant nodes are tuned with on-chip transmission lines. These have been simulated in ADS and compared to a standard Cadence component, tline3. The Cadence component gives a somewhat pessimistic estimation of the losses in the transmission line. The single ended input amplifier outputs a maximum of 3.7 dBm and draws 27 mA from a 1.2 V supply, while the one with differential input outputs 5.0 dBm and draws 28 mA. TTwo different frequency doubling power amplifier topologies have been compared, one with differential input and one with single-ended, both with single-ended output at 60 GHz. The frequency doubling capability is valuable from at least two perspectives, 1) the high frequency signal is on the chip as little as possible 2) the voltage controlled oscillator and power amplifier are at different frequencies easing the isolation of the two in a transceiver. The topologies have been simulated in a 1p8M 130-nm CMOS process. The resonant nodes are tuned with on-chip transmission lines. These have been simulated in ADS and compared to a standard Cadence component, tline3. The Cadence component gives a somewhat pessimistic estimation of the losses in the transmission line. The single ended input amplifier outputs a maximum of 3.7 dBm and draws 27 mA from a 1.2 V supply, while the one with differential input outputs 5.0 dBm and draws 28 mA. The 3-dB bandwidth of the amplifiers are 5.9 GHz and 6.8 GHz, respectively.he 3-dB bandwidth of the amplifiers ar- e 5.9 GHz and 6.8 GHz, respectively.
Keywords :
CMOS integrated circuits; harmonic generation; power amplifiers; transceivers; voltage-controlled oscillators; CMOS; Cadence component; frequency doubling power amplifier; on-chip transmission lines; second harmonic power amplifiers; single ended input amplifier; transceiver; voltage controlled oscillator; CMOS process; Differential amplifiers; Frequency; High power amplifiers; Power amplifiers; Power system harmonics; Power transmission lines; Topology; Transceivers; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Research in Microelectronics and Electronics Conference, 2007. PRIME 2007. Ph.D.
Conference_Location :
Bordeaux
Print_ISBN :
978-1-4244-1000-2
Electronic_ISBN :
978-1-4244-1001-9
Type :
conf
DOI :
10.1109/RME.2007.4401833
Filename :
4401833
Link To Document :
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