DocumentCode :
2369754
Title :
Realizing super-steep subthreshold slope with conventional FDSOI CMOS at low-bias voltages
Author :
Lu, Z. ; Collaert, N. ; Aoulaiche, M. ; De Wachter, B. ; De Keersgieter, A. ; Fossum, J.G. ; Altimime, L. ; Jurczak, M.
Author_Institution :
Imec, Leuven, Belgium
fYear :
2010
fDate :
6-8 Dec. 2010
Abstract :
We report the first demonstration of a super-steep subthreshold slope (SS) (the smallest ever reported experimentally) with ultra-thin BOX (UTBOX) FDSOI standard CMOS transistors. Record steep SS of 72μV/dec for Lg=25nm and 58μV/dec for Lg=55nm at room temperature are achieved with low voltages. The device also exhibits high ON-state current (~100μA/μm), as compared to other devices from this class. As a result, ION/IOFF ratio of 108 is realized with 0.5V gate swing for Lg=55nm MOSFETs. The excellent reliability is also demonstrated.
Keywords :
CMOS integrated circuits; MOSFET; MOSFET; conventional FDSOI CMOS; low-bias voltages; super-steep subthreshold slope; ultra-thin BOX FDSOI standard CMOS transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2010 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0163-1918
Print_ISBN :
978-1-4424-7418-5
Electronic_ISBN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.2010.5703377
Filename :
5703377
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2369754
بازگشت