• DocumentCode
    2369870
  • Title

    The factorial Delay Locked Loop: a solution to fulfill multistandard RF synthesizer requirements

  • Author

    Majek, Cedric ; Deval, Yann ; Lapuyade, Hervé ; Bégueret, Jean-Baptiste

  • Author_Institution
    IMS Lab., Bordeaux
  • fYear
    2007
  • fDate
    2-5 July 2007
  • Firstpage
    185
  • Lastpage
    188
  • Abstract
    This paper presents the study of a frequency synthesizer dedicated to multistandard wireless objects: the factorial delay locked loop (DLL). Feasibility of such a circuit has been already made, according to behavioral simulations, but no investigation was performed on the ability of the system to take into account all the requirements of multistandard frequency synthesizer, and particularly, the phase noise response of the system.
  • Keywords
    delay lock loops; frequency synthesizers; phase noise; behavioral simulations; factorial delay locked loop; multistandard RF synthesizer; multistandard wireless objects; phase noise response; Charge pumps; Delay; Energy consumption; Frequency synthesizers; Local oscillators; Phase frequency detector; Phase locked loops; Phase noise; Radio frequency; Radio transmitters;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Research in Microelectronics and Electronics Conference, 2007. PRIME 2007. Ph.D.
  • Conference_Location
    Bordeaux
  • Print_ISBN
    978-1-4244-1000-2
  • Electronic_ISBN
    978-1-4244-1001-9
  • Type

    conf

  • DOI
    10.1109/RME.2007.4401843
  • Filename
    4401843